Semiconductor chips provide memory storage for electronic devices and have become very popular in the electronic products industry. In general, many semiconductor chips are typically fabricated (or built) on a silicon wafer. The semiconductor chips are individually separated from the wafer for subsequent use as memory in electronic devices. In this regard, the semiconductor chips include memory cells. One type of a memory cell is a resistive memory cell that is configured to store retrievable data, often characterized by the logic values of 0 and 1.
Phase change memory cells are one type of memory cell capable of resistively storing retrievable data between two or more separate states (or phases). In one known structure of a phase change memory cell, the memory cell is formed at the intersection of a phase change memory material and an electrode. Delivering an appropriate amount of energy to the electrode heats the phase change memory cell, thus affecting a phase/state change in its atomic structure. The phase change memory cell can be selectively switched between logic states 0 and 1, for example, and/or selectively switched between multiple logic states.
Materials that exhibit the above-noted phase change memory characteristics include the elements of Group VI of the periodic table (such as Tellurium and Selenium) and their alloys, referred to as chalcogenides or chalcogenic materials. Other non-chalcogenide materials also exhibit phase change memory characteristics.
The atomic structure of one type of phase change memory cell can be switched between an amorphous state and one or more crystalline states. In this regard, the atomic structure can be switched between a general amorphous state and multiple crystalline states. The amorphous state has greater electrical resistance than the crystalline state(s), and typically includes a disordered atomic structure. In contrast, the crystalline states each generally have a highly ordered atomic structure, and the more ordered the atomic structure of the crystalline state, the lower the electrical resistance (and the higher the electrical conductivity).
When switching between memory/phase states the atomic structure of a phase change material becomes highly ordered (crystalline) when maintained at (or slightly above) the crystallization temperature. To switch the memory material back to the amorphous state, the local temperature is generally raised above the melting temperature (approximately 600 degrees Celsius in the case of Ge2Sb2Te5) to achieve a highly random atomic structure, and then rapidly cooled to “lock” the atomic structure in the amorphous state.
The temperature-induced changes in phase/state may be achieved in a variety of ways. For example, a laser can be directed to the phase change material, current can be driven through the phase change material, or current can be passed through a resistive heater adjacent the phase change material. In any of these methods, controlled heating of the phase change material causes controlled phase change within the phase change material.
The variation in electrical resistance between the amorphous state and the crystalline state(s) in phase change materials can be beneficially employed in two level or multiple level systems where the resistivity is either a function of the bulk material or a function of the partial material. Manipulating the states of the chalcogenide permits a selective control over the electrical properties of the chalcogenide, which is useful in the storage and retrieval of data from the memory cell containing the chalcogenide.
During fabrication of memory cells, portions of a pre-processed wafer are etched to define the individual cell structure. Variations in the fabricated layers of the memory cell structure can lead to non-uniform thicknesses of the layers that are deposited onto the pre-processed wafer. This in turn can lead to over-etching of one or more layers of the memory cell. Over-etching of the phase change layer in the memory cells can create structural inhomogeneity between memory cells, and can affect the collective performance of the memory cells. In particular, during etching of a metallic bottom electrode that is in contact with a phase change material, the phase change material is etched, and in some cases, undesirably over-etched.
For these and other reasons, there is a need for the present invention.